The Analog Devices ADuC812 is an 8051 based controller with 8-channel true 12-bit ADC, Dual 12-bit DAC's, On-chip DMA controller, 32 I/O lines, 3 Timers/Counters, WDT, SPI, UART, 9 Interrupts Sources/2 Priority Levels, 8K Flash EEPROM Program Memory, 640 Bytes Data Flash EEPROM, 256 Bytes On-chip.

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Ethernet hardware addresses are 48 bits, expressed as 12 hexadecimaldigits (0-9, plus A-F, capitalized). These 12 hex digits consist of thefirst/left 6 digits (which should match the vendor of the Ethernetinterface within the station) and the last/right 6 digits which specifythe interface serial number for that interface vendor.

Ethernet addresses might be written unhyphenated (e.g. 123456789ABC), orwith one hyphen (e.g. 123456-789ABC), but should be written hyphenatedby octets (e.g. 12-34-56-78-9A-BC).

These addresses are physical station addresses, not multicast norbroadcast, so the second hex digit (reading from the left) will be even,not odd.

According to some informal correspondence, when the IEEE assigns anEthernet address block, a block of 2**25 is reserved. Both a unicastand a multicast (group address) block, in a pair. Thus multicast groupsfor vendor-specific uses tend to match the non-multicast vendorassignments with '010000' added. This rule seems to be true for most ofthe addresses in these files.

A portion of the vendor block address is reportedly assigned serially,with the other portion intentionally assigned randomly. If there is aglobal algorithm for which addresses are designated to be physical (in achipset) versus logical (assigned in software), or globally-assignedversus locally-assigned addresses, some of the known addresses do notfollow the scheme (e.g AA0003; 02xxxx).

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